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Friday, May 15, 2020 | History

2 edition of Back-etched super junction LDMOST on SOI. found in the catalog.

Back-etched super junction LDMOST on SOI.

Shahla Honarkhah

Back-etched super junction LDMOST on SOI.

by Shahla Honarkhah

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Published .
Written in English


About the Edition

The electrical characteristics of a CMOS compatible BLDMOST on a 0.8 mum SOI film were investigated. The device with 15.5 mum of SJ length exhibits breakdown voltage of 317 V, specific on-resistance of 50 mOcm 2 and charge on-resistance product of 3.84 OnC. An optimized BLDMOST, on 4 mum SOI film, with the same SJ drift region exhibits break-down voltage of 328 V, specific on-resistance of 8.6 mOcm 2 and charge on-resistance product of 0.73OnC. This latter device breaks the on-resistance-breakdown voltage silicon limit.To verify the concept and the suppression of the substrate depletion effect, super-junction diodes on a 0.8 mum SOI film were successfully implemented in a SOI CMOS compatible process.This thesis deals with the design and implementation of high voltage SJLDMOSTs for future generations of power IC applications. Conventional SJLDMOSTs fabricated on a semiconductor substrate suffer from low breakdown voltage due to substrate-depletion effects. In this thesis, a back etched SJLDMOST (BLDMOST) on SOI structure is proposed to overcome this problem by eliminating the silicon substrate under the device.

The Physical Object
Pagination70 leaves.
Number of Pages70
ID Numbers
Open LibraryOL19747503M
ISBN 100612914585

Contact Us. Contact us directly: P: or SUTURES ()F: E: [email protected] Chat with us! Look for the chat box in the lower right-hand corner of our site. A MOSFET structure named FITMOS has been successfully developed and exhibits record-low loss in the 60 volt breakdown voltage range. The device has a body diode with superior reverse recovery characteristics and exhibits an extremely small value for R on Q distinctive feature of this device is the use of floating islands formed by self-alignment and trench gates with a thick oxide layer.

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Back-etched super junction LDMOST on SOI by Shahla Honarkhah Download PDF EPUB FB2

Conventional super junction LDMOSTs (SJLDMOSTs), fabricated on an SOI substrate, suffer from low breakdown voltage due to substrate-depletion effects. In this work, a back etched SJLDMOST.

Abstract: Conventional super junction LDMOSTs (SJLDMOSTs), fabricated on an SOI substrate, suffer from low breakdown voltage due to substrate-depletion effects. In this work, a back etched SJLDMOST (BSJLDMOST) on SOI is proposed to overcome this problem by eliminating the silicon substrate under the device.

Fig. 1 shows 3D schematic views of the SOI CSJ LDMOS and the proposed SOI BSJ-PT LDMOS, respectively. In the proposed device, the trench, which is located underneath the source side, is filled with a p-type epitaxial layer.

In addition, a stepped buried-oxide structure forms below the drift region Back-etched super junction LDMOST on SOI. book wafer bonding [26,27].The BSJ structure is introduced in the drift region of the new : Pan-pan Tang, Ying Wang, Fei Cao, Cheng-hao Yu, Meng-tian Bao, Xin Luo.

A new buffered super junction (SJ) LDMOS on silicon-on-insulator (SOI) is proposed to eliminate the substrate-assisted depletion effect. The trenched buried oxide is self-adaptive to collect the additional charges according to the variable electric field strength, which forms a dynamic buffer between the SJ and the by: 4.

A novel step-oxide super junction-lateral double-diffused metal–oxide–semiconductor field-effect transistor (SOSJ-LDMOS) structure is proposed and optimised which allows the high breakdown voltage (BV) and low-specific on-resistance (R on,sp).

The proposed structure overcomes the effect of thick field oxide formed by shallow trench isolation process in conventional buffer layer SJ-LDMOS (N Cited by: 4. Introduction. The main concern of the LDMOS (lateral double-diffused MOS) which is widely used in Power ICs is to achieve the tradeoff between the BV and specific on-resistance (R on,sp) [].The SJ technology has been proposed to break silicon limit between the BV and R on, SJ LDMOS achieves low R on,sp and high BV through highly doped N pillar and the surface electric field Cited by: 3.

Back-etched super-junction LDMOST on SOI p. A two mask complementary LDMOS module integrated in a [mu]m SiGe:C BiCMOS platformp. Source-gated transistors for thin film electronics p.

Integrated micro-channel cooling in silicon p. This site uses cookies. By continuing to use this site you agree to our use of cookies. To find out more, see our Privacy and Cookies by: 4. Books. Publishing Support. Login. Nassif-khalil S G and Salama C A T Super junction LDMOST in silicon-on-sapphire technology Honarkhah S, Nassif-Khalil S and Salama C A T Back-etched super-junction LDMOST on SOI Solid-State Cited by: 1.

Conventional super-junction lateral double diffused MOSFET (SJ-LDMOS) fabricated on Silicon on Insulator (SOI) substrate suffers from low breakdown voltage under the same on-resistance due to substrate-assisted depletion effect. To suppress this effect, it is important to find the charge density in the inversion layer under buried oxide.

In this paper, we propose a charge density equation and Author: Chao Xia, Xin Hong Cheng, Zhong Jian Wang, Da Wei He, Duo Cao, Ting Ting Jia, Yue Hui Yu, Da Shen Sh. Based on the optimization idea of the electric field from the surface to the bulk, this paper summarizes the basic theory and the two types of analytical optimization methods of the super junction (SJ) device.

The essential difference between the SJ and the conventional power MOS structure is: the former is the junction-type voltage sustaining layer with the periodic N/P dopings and the later Cited by: 2.

GET ACCESS. How to get online access; FOR CONTRIBUTORS. Author Guidelines; ABOUT THIS BOOK. What's New; Editors & Contributors. S.G. Nassif-Khalil, C.A.T. Salama, V super junction—LDMOST in a μm commercial CMOS/SOS technology.

International symposium on power semiconductor devices & ICs, Cambridge, UK, Google ScholarCited by: 1. I.-Y. Park, C.A.T. Salama, CMOS compatible super junction LDMOST with N-Buffer layer, in International Symposium on Power Semiconductor Devices and ICs, Santa Barbara, CA Google Scholar 3.

Erlbacher, A.J. Bauer, L. Frey, Reduced on resistance in LDMOS devices by integrating trench gates into planar : Tobias Erlbacher.

Power semiconductor devices control the energy flow in virtually every electric and electronic system. Most commonly recognized applications are: automotive, traction, consumer electronics, air conditioning, electric engines.

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Easy to use. No measuring, taping or cutting. Machine washable and reusable.4/4(18). Back-etched super-junction LDMOST on SOI S Honarkhah, S Nassif-Khalil, CAT Salama Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. Junction Box, Screw, Solid Cover, Size/Dims: xx, Material/Finish: PVC/Gray, NEMA Rating: 1, 2, 3R, 4, 4X, 6, 6P, 12, Collectible leather-bound books, accented in 22kt gold.

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